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{\bf Prevec }

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{\bf Shared-Memory, Parallel Vector Processor}

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{\bf Architecture:}
VLIW parallel system.
General-purpose 32-node supercomputer,
expandable to as many processors as needed.

{\bf Configuration:}
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Cross-bar \\
Uses BIT chip for floating point\\
25 nsec cycle time\\
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{\bf Performance:}  Livermore Loops, LINPACK - 50 Mflops per node
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{\bf Status:} \$50K for a single processor.  Product to be available second quarter of 1990.

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{\bf Contact:}
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J. Yoon, President\\
Prevec Computer Co.\\
3713 S. George Mason Dr.\\
Suite C 1 W \\
Forest Church, VA  22041\\
703-845-1800  \\

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