<html><head><meta name="color-scheme" content="light dark"></head><body><pre style="word-wrap: break-word; white-space: pre-wrap;">{\bf
Multiflow TRACE 7/200, 14/200, and 28/200}


\vspace{.1in}
\noindent
{\bf
Scalar VLIW (Very Long Instruction Word) Computer}

\vspace{.1in}
\noindent
{\bf Architecture:}
Designed for Trace Scheduling Compacting Compilers.
Each model within the TRACE
family of processors executes instructions
ranging to 1024 bits in length.  The entry-level TRACE 7/200 is capable of
initiating seven operations (two floating-point,
four integer/load/store,
and one branch operation) on each
130 ns instruction cycle.  The TRACE
14/200 and 28/200 can initiate fourteen and twenty-eight operations per cycle,
respectively.

\vspace{.1in}
\noindent
The TRACE design includes no microcode and very little synchronization
logic.  Rather, the very wide horizontal architecture
is directly exposed to TRACE Fortran and C language compilers.  This allows the
TRACE compilers to generate wide instructions automatically, without
programmer intervention, based upon unusually wide-scope analysis of
application code.

\vspace{.1in}
\noindent
As a result, the TRACE hardware/software system presents
itself to the programmer (and to the source-level program) as a conventional
computer that executes a single instruction stream at high speed. 

\vspace{.1in}
\noindent
{\bf Configuration:}
The TRACE 7/200 and its basic peripheral complement are
housed in a single equipment bay
28"w x 40"d x 60"h.
The 7/200 is directly field-upgradable into the wider word TRACE models
by inserting additional integer and floating-point modules into its
backplane; expansion cabinetry is necessary only for additional disk
and tape storage.

\vspace{.1in}
\noindent
Attached VME I/O processors
handle low-level I/O functions, allowing the CPU to operate
with minimal interruption.

\vspace{.1in}
\noindent
Register Complement: 160, 320, and 640 general-purpose 32-bit registers for the 7, 14, and 28/200, respectively

\vspace{.1in}
\noindent
Access bandwidths of 984, 1968, and 3692 Mbytes/sec, respectively

\vspace{.1in}
\noindent
Instruction cache: 8K instructions, independent of instruction width

\vspace{.1in}
\noindent
Technology: CMOS functional units, 8K CMOS gate arrays, and Schottky TTL
logic

\vspace{.1in}
\noindent
Memory: 16 to 512 Mbytes capacity, with ECC (all models);
up to 64-way interleaved (all models).

\vspace{.1in}
\noindent
Four-Gbyte demand-paged virtual address space per process

\vspace{.1in}
\noindent
Floating Point: IEEE 32- and 64-bit formats

\vspace{.1in}
\noindent
Hardware add, multiply, divide, and square root

\vspace{.1in}
\noindent
Power and Cooling: Requires 2.5 to 7 KVA, depending upon configuration.
Operates from 10 to 35 C with air cooling.

\vspace{.1in}
\noindent
{\bf Software:}
Operating System: Multiflow's adaptation of UNIX bsd 4.3, including
fast file system, TCP/IP, network file system, disk striping,
asynchronous disk I/O, shared libraries, and copy-on-write. 

\vspace{.1in}
\noindent
VAX Compatibility: A suite of tools that allow the TRACE to perform
as an adjunct to an existing VAX/VMS-based computing environment.

\vspace{.1in}
\noindent
Trace Scheduling compacting compilers from
Multiflow
exploit the fine-grained
parallelism present throughout nearly all applications.

\vspace{.1in}
\noindent
{\bf Languages:}
TRACE Fortran compatibility spans
ANSI Fortran 66, Fortran 77, and proposed 8X; VAX/VMS Fortran; Cray Fortran;
and IBM Fortran.

\vspace{.1in}
\noindent
TRACE C improves the performance of C codes generally, including the UNIX
operating system and related utilities.

\vspace{.1in}
\noindent
{\bf Applications:}
Though users
often focus upon highly visible, mathematics-intensive
applications, O.S. kernel and library functions are comparably
important.

\vspace{.1in}
\noindent
{\bf Performance:}
Multiflow submits that processors in the mini-supercomputer price range ought to
be evaluated in the same terms as their minicomputer cousins: by
interactive performance
across a broad range of applications, not by isolated vectorizable
applications alone.  With the advent of the TRACE,
Multiflow contends that there is no reason
why mini-supercomputers should not be treated simply as faster
super-minicomputers.

\vspace{.1in}
\noindent
Benchmark Performance (TRACE 7/200, Software Release 1, April 1987):

\begin{flushleft}
LINPACK 100 x 100 Compiled at Full Precision -- 6.0 Mflops\\
Double-Precision Livermore Loops Harmonic Mean -- 2.3 Mflops\\
Double-Precision Whetstone -- 12605 KWhets\\
\end{flushleft}
ANSYS Test Cases (CPU Seconds per Job):
SP-1 -- 31, SP-2 -- 84, SP-3 -- 135, and SP-4 -- 51

\vspace{.1in}
\noindent
ANSYS Large Cases (Elapsed Seconds per Job):
M1 -- 40, M2 -- 516, M3 -- 3989;
S1 -- 374, S2 -- 1955, S3 -- 5842, S4 -- 13209, S5 -- 12499

\vspace{.1in}
\noindent
Peak Performance:

\vspace{.1in}
\begin{flushleft}
TRACE 7/200 -- 53 VLIW MIPS, 30 Mflops / SP, 15 Mflops / DP \\
TRACE 14/200 -- 107 VLIW MIPS, 60 Mflops / SP, 30 Mflops / DP \\
TRACE 28/200 -- 215 VLIW MIPS, 120 Mflops / SP, 60 Mflops / DP \\
\end{flushleft}


\vspace{.1in}
\noindent
{\bf Status:}
Multiflow announced the
TRACE product family April 21, 1987, for first production shipment in
mid-1987.
System packages start below \$300,000.

\vspace{.1in}
\noindent
{\bf Contact:}
\begin{flushleft}
Multiflow Computer Inc.\\
175 North Main Street\\
Branford, CT  06405\\

\vspace{.1in}
Voice and FAX: 203/488-6090\\
Voice only: 800/777-1428\\
UUCP: decvax!yale!mfci!smith\\
Technical Contact: John O'Donnell, V.P. of Engineering\\
Sales Contact: Robert Smith, V.P. of Sales and Marketing\\
\end{flushleft}
</pre></body></html>